1. Technical Field
The present invention generally relates to fabrication of non-planar semiconductor structures. More particularly, the present invention relates to preventing non-uniform gate height over N and P type raised structures on the substrate, by selective etching of a lithographic blocking material to expose a gate cap and planarizing the gate cap prior to growing epitaxy on the N type raised structures and P type raised structures.
2. Background Information
In a conventional fin-based semiconductor process with both N and P type fins, when growing epitaxy on top of the fins (one kind for N type fins, and a different kind for P type fins), the protective materials used during lithography for both types of fins overlap in a small area above the gate, resulting in a non-uniform gate height over the different epitaxies.
Therefore, a need exists for a way to prevent the non-uniform gate height during the use of lithography.